01. about
Electronics & Communication Engineering graduate focused on VLSI, Analog & Digital IC Design, Verilog HDL, and FPGA development. Experienced with Cadence Virtuoso, CMOS circuit design, RTL design, and digital system development through internships and hands-on projects.
Focus Areas
Analog & Digital VLSI
CMOS Circuit Design
Verilog HDL & RTL
FPGA Development
SRAM Design
02. Experience
Onsite • Indore
Digital Design & VLSI Intern
SVVV | Jul 2025 – Aug 2025
Developed digital circuits using Verilog HDL.
Designed adders, multiplexers, counters, FSMs, and arithmetic circuits.
Implemented a UART transmitter and receiver.
Worked with FPGA design and Quartus II.
Skills: Verilog HDL · RTL Design · FPGA · Quartus II · FSM
Onsite • Indore
Analog Chip Design Intern
SGSITS | Feb 2025 – Mar 2025
Designed and simulated OTA and Schmitt Trigger circuits.
Worked on schematic, layout, DRC, LVS, and PEX.
Gained hands-on experience in Analog CMOS Design.
Used Cadence Virtuoso for circuit design and verification.
Skills: Cadence Virtuoso · Analog CMOS · Layout · DRC · LVS · PEX
03. Projects
Cadence Virtuoso · CMOS · 180nm
6T, 8T & 10T SRAM Design and Analysis
Designed and analyzed 6T, 8T, and 10T SRAM cells, including schematic and layout implementation. Performed DRC, LVS, and PEX verification and evaluated SNM, power, delay, and area.
Analog CMOS · Cadence Virtuoso
Implementation and Verification of OTA & Schmitt Trigger
Designed and simulated OTA and Schmitt Trigger circuits using Cadence Virtuoso. Performed schematic design, layout, AC analysis, and post-layout verification.
Digital Design / FPGA
PS/2 Keyboard Interfacing with FPGA
Interfaced a PS/2 keyboard with an FPGA to capture key inputs and display them on a 7-segment display. Implemented Verilog-based data handling and FSM design for reliable input processing.
04. SKILLS
VLSI Design & Verification
Analog CMOS Circuit Design
FPGA Development
Embedded Systems & IoT
Cadence Virtuoso
Quartus
MATLAB
Arduino IDE
SystemVerilog (Basic)
C++ (Basic)
System Design
UART
I2C
Testing
Debugging
